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november 2011 doc id 18348 rev 2 1/13 13 STL7NM60N n-channel 600 v, 0.805 ? , 5.8 a powerflat? 5x5 mdmesh? ii power mosfet features 100% avalanche tested low input capacitance and gate charge low gate input resistance application switching applications description this device is an n-channel power mosfet developed using the second generation of mdmesh? technology. this revolutionary power mosfet associates a vertical structure to the company?s strip layout to yield one of the world?s lowest on-resistance and gate charge. it is therefore suitable for the most demanding high efficiency converters. figure 1. internal schematic diagram order code v dss @ t jmax r ds(on) max. i d STL7NM60N 650 v < 0.90 ? 5.8 a (1) 1. the value is rated according rthj-case powerflat? 5x5 1 4 5 7 8 11 12 14 pin 1 dr a in s 2 s 3 s 4 (not connected) d 14 d 1 3 d 12 11 g 10 s 9 s 8 s 5 d 6 d 7 d top view table 1. device summary order code marking package packaging STL7NM60N 7nm60n powerflat? 5x5 tape and reel www.st.com
contents STL7NM60N 2/13 doc id 18348 rev 2 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STL7NM60N electrical ratings doc id 18348 rev 2 3/13 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v ds drain-source voltage 600 v v gs gate-source voltage 25 v i d (1) 1. the value is rated according r thj-case . drain current (continuous) at t c = 25 c 5.8 a i d (1) drain current (continuous) at t c =100 c 3.7 a i d (2) 2. when mounted on fr-4 board of 1inch2, 2oz cu, t < 10 sec drain current (continuous) at t amb = 25 c 1.4 a i d (2) drain current (continuous) at t amb =100 c 0.9 a i dm (2)(3) drain current (pulsed) 5.6 a p tot (2) total dissipation at t amb = 25 c 4 w p tot (1) total dissipation at t c = 25 c 68 w i as avalanche current, repetitive or not-repetitive (3) 3. pulse width limited by tjmax 2a e as single pulse avalanche energy (4) 4. starting tj = 25 c, i d = i as , v dd = 50 v 119 mj dv/dt (5) 5. i sd 5.8 a, dv/dt 400 a/s,v ds peak v (br)dss , v dd = 80% v (br)dss. peak diode recovery voltage slope 15 v/ns t j t stg operating junction temperature storage temperature -55 to 150 c table 3. thermal resistance symbol parameter value unit r thj-case thermal resistance junction-case max. 1.85 c/w r thj-amb (1) 1. when mounted on fr-4 board of 1inch2, 2oz cu, t < 10 sec. thermal resistance junc tion-amb max. 31.3 c/w
electrical characteristics STL7NM60N 4/13 doc id 18348 rev 2 2 electrical characteristics (t case =25c unless otherwise specified) table 4. on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage (v gs = 0) i d = 1 ma 600 v i dss zero gate voltage drain current (v gs = 0) v ds = 600 v, v ds = 600 v, t c = 125 c 1 100 a a i gss gate body leakage current (v ds = 0) v gs = 25 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 2.5 a 0.805 0.90 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 50v, f=1 mhz, v gs =0 - 363 24.6 1.1 - pf pf pf c oss eq. (1) 1. c oss eq. is defined as a constant equi valent capacitance giving t he same charging time as c oss when v ds increases from 0 to 80% v dss output equivalent capacitance v gs =0, v ds =0 to 480 v - 130 - pf rg gate input resistance f=1 mhz gate dc bias=0 test signal level = 20 mv open drain -5.4 - ? q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 480 v, i d = 5 a v gs =10 v (see figure 15 ) - 14 2.7 2.7 - nc nc nc table 6. switching times symbol parameter test cond itions min. typ. max. unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 300 v, i d = 2.5 a, r g = 4.7 ?, v gs = 10 v (see figure 14 ) 7 10 26 12 ns ns ns ns
STL7NM60N electrical characteristics doc id 18348 rev 2 5/13 table 7. source drain diode symbol parameter test conditions min typ. max unit i sd source-drain current - 5.8 a i sdm (1) , (2) 1. pulse width limited by safe operating area. 2. when mounted on fr-4 board of 1inch2, 2 oz cu. source-drain current (pulsed) 23 a v sd (3) 3. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 5 a, v gs =0 - 1.3 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 5 a, di/dt = 100 a/s, v dd = 60 v (see figure 16 ) - 213 1.5 14 ns nc a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 5 a, di/dt = 100 a/s, v dd = 60 v, tj= 150 c (see figure 16 ) - 265 1.8 14 ns nc a
electrical characteristics STL7NM60N 6/13 doc id 18348 rev 2 2.1 electrical characteri stics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on resistance i d 1 0.1 0.01 0.001 0.1 1 100 v d s (v) 10 (a) oper a tion in thi s a re a i s limited b y m a x r d s (on) 10 s 100 s 1m s 10m s tj=150c tc=25c s ingle p u l s e 10 am07211v1 i d 5 3 1 0 0 10 v d s (v) 20 (a) 40 7 8 5v 6v v g s =10v 2 4 6 9 am06477v1 i d 6 4 2 0 0 4 v g s (v) 8 (a) 2 6 10 8 1 3 5 7 9 10 v d s =20v am0647 8 v1 v g s 6 4 2 0 0 4 q g (nc) (v) 12 8 6 8 10 v dd =4 8 0v i d =5a 14 12 3 00 200 100 0 400 500 v d s 2 10 16 v d s (v) am06479v1 r d s (on) 0.7 8 0.76 0.74 0 2 i d (a) ( ohm ) 1 3 0. 8 0 0. 8 2 v g s =10v 4 5 0. 8 4 0. 8 6 0. 88 am064 8 0v1
STL7NM60N electrical characteristics doc id 18348 rev 2 7/13 figure 8. capacitance variations figure 9. output capacitance stored energy figure 10. normalized gate threshold voltage vs temperature figure 11. normalized on resistance vs temperature figure 12. normalized b vdss vs temperature figure 13. source-drain diode forward characteristics c 1000 100 10 1 0.1 10 v d s (v) (pf) 1 100 ci ss co ss cr ss am064 8 1v1 e o ss 1.0 0.5 0 0 100 v d s (v) ( j) 400 200 3 00 1.5 500 600 2.0 2.5 am064 8 2v1 v g s (th) 1.00 0.90 0. 8 0 0.70 -50 0 t j (c) (norm) -25 1.10 75 25 50 100 i d =250 a am064 83 v1 r d s (on) 1.9 1. 3 0.9 0.5 -50 0 t j (c) (norm) -25 75 25 50 100 0.7 1.1 1.5 1.7 2.1 am064 8 4v1 i d =2.5a v d s -50 0 t j (c) (norm) -25 75 25 50 100 0.92 0.94 0.96 0.9 8 1.00 1.02 1.04 1.06 i d =1ma 1.0 8 1.10 am0902 8 v1 v s d 0 2 i s d (a) (v) 1 5 3 4 0 0.2 0.4 0.6 0. 8 1.0 1.2 t j =-50c t j =150c t j =25c 7 6 am0 8 91 3 v1
test circuits STL7NM60N 8/13 doc id 18348 rev 2 3 test circuits figure 14. switching times test circuit for resistive load figure 15. gate charge test circuit figure 16. test circuit for inductive load switching and diode recovery times figure 17. unclamped inductive load test circuit figure 18. unclamped inductive wavefo rm figure 19. switching time waveform am0146 8 v1 v g s p w v d r g r l d.u.t. 2200 f 3 . 3 f v dd am01469v1 v dd 47k ? 1k ? 47k ? 2.7k ? 1k ? 12v v i =20v=v gmax 2200 f p w i g =con s t 100 ? 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 ? a a b b r g g fa s t diode d s l=100 h f 3 . 3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3 . 3 f v dd am01472v1 v (br)d ss v dd v dd v d i dm i d am0147 3 v1 v d s t on td on td off t off t f t r 90 % 10 % 10 % 0 0 90 % 90 % 10 % v g s
STL7NM60N package mechanical data doc id 18348 rev 2 9/13 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STL7NM60N 10/13 doc id 18348 rev 2 figure 20. powerflat? 5x5 mechanical drawing table 8. powerflat? 5x5 mechanical dimensions dim. mm min. typ. max. a 0.80 0.90 1.0 a1 0 0.02 0.05 a3 0.24 d 4.90 5.0 5.10 e 4.90 5.0 5.10 e2 2.49 2.57 2.64 e 1.22 1.27 1.32 b 0.43 0.51 0.58 c 0.64 0.71 0.79
STL7NM60N package mechanical data doc id 18348 rev 2 11/13 figure 21. powerflat? 5x5 recommended footprint (dimensions in mm)
revision history STL7NM60N 12/13 doc id 18348 rev 2 5 revision history table 9. document revision history date revision changes 18-jan-2011 1 first release. 10-nov-2011 2 updated figure 1: internal schematic diagram in cover page. updated table 2: absolute maximum ratings and section 4: package mechanical data . minor text changes.
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